1. Field of the Invention
The invention relates to optoelectronic devices based on nanowires for the generation of light, and especially LEDs (light-emitting diodes).
2. Description of Related Art
Schematically, a LED comprises a semiconductor area for electron injection, a semiconductor area for hole injection, and a so-called “active” semiconductor area where the injected electrons and holes radiatively recombine.
The first technology used to manufacture LEDs is the so-called “planar” technology. Because planar technology raises a number of issues, especially in terms of quantum efficiency and/or in terms of mesh matching between the different materials used and/or in terms of limitation of the wavelength capable of being emitted, LEDs based on nanowires having multiple quantum well confinement structures have been developed. Such nanowires, and more specifically their manufacturing method, indeed have a number of advantages, and in particular:                a growth of nanowires on substrates, with the possibility for each nanowire to be made of a material with a mesh parameter mismatch with respect to the other. Thus, silicon, which is a low-cost substrate capable of being manufactured with a large size and conductive, can be envisaged for the growth of nanowires made of III-N material, which is impossible in planar technology. This variation has advantages both in terms of production cost and of simplification of manufacturing processes, especially at the electrical injection level;        a good crystal quality due to the relaxation of the stress at the free surfaces. Thus, a decrease in the number of non-radiative recombination centers with respect to planar structures, and especially an absence of through dislocations which would adversely affect the quantum efficiency of LEDs, can be observed; and        a better extraction of light without complicating manufacturing processes.        
Two categories of nanowires used to form LEDs can be distinguished in the art:                that where the active area of the nanowires comprises confinement structures with axial-epitaxy multiple quantum wells, that is, grown along the nanowire growth axis,        that where the active area of the nanowires comprises confinement structures with radial-epitaxy multiple quantum wells, that is, in a volume formed around the nanowire growth axis.        
FIG. 1 schematically shows in cross-section view an example of a nanowire forming a nano-LED 10 with axial-epitaxy multiple quantum wells. Nano-LED 10 is formed of a GaN layer 14 n-doped with silicon, formed on an n+-doped silicon substrate 12, having an active area 16 formed of axial multiple quantum wells made of an alternation of unintentionally doped GaN areas 18 and InGaN areas 20 formed thereon. A GaN area 22 p doped with magnesium is further deposited on a p-doped AlGaN electron-blocking area 24, commonly called EBL (“Electron Blocking Layer”), itself deposited on active area 16.
According to this axial geometry, the electrons and the holes are injected into active area 16 respectively by means of substrate 12, via area 14 and area 22, and recombine, at least partly radiatively, in InGaN quantum wells 20 of active area 16.
FIG. 2 schematically shows in cross-section view an example of a nanowire forming a nano-LED 30 with multiple quantum wells grown by radial epitaxy around a core 34 itself deposited on an n+-type doped substrate 32. Nano-LED 30 comprises a core 34 formed of GaN n doped with silicon and a shell comprising active area 36 with radial multiple quantum wells formed of an alternation of unintentionally doped GaN areas 38 and InGaN area 40, an EBL volume 44 surrounds active area 36, EBL volume 44 being itself surrounded with a GaN volume 42 p doped with magnesium.
Areas 36, 44, and 42 are further formed on an electric insulation layer 46, core 34 being formed directly in contact with substrate 32.
According to this radial geometry, the electrons and the holes are injected into active area 36 respectively by means of substrate 32, via core 34, and area 42, and recombine at least partly radiatively in InGaN quantum wells 40 of active area 36. A nanowire architecture where one of the hole and electron injection areas forms a shell at least partly surrounding a core comprising the active recombination area is usually called “core/shell”.
Whatever the axial or radial configuration of the nanowires, the electric power supply of an array of nanowires is conventionally performed in parallel. An example of parallel connection is illustrated in FIGS. 3 and 4, which respectively are a simplified top view of a LED comprising an array 50 of nanowires 10, 30, in the illustrated example, an array of three nanowires by three nanowires, and a simplified cross-section view along plane A-A of FIG. 3.
As illustrated, nanowires 10, 30 are embedded in a planarizing layer 52 made of an electrically-insulating material and are connected in parallel between an upper electrode 54, formed on layer 52, and a lower electrode 56, arranged under substrate 12, 32 having nanowires 10, 30 formed thereon. Many parallel connection schemes have been designed, examples being for example described in documents US 2005/0253138, US 2007/0057248, US 2008/0157057, WO2008/048704, WO2008/140611, and WO2010/071594.
For an electric current to be able to flow in a nanowire, said nanowire has to be submitted to a minimum power supply voltage, called “threshold voltage”, having a value depending on the morphological properties (height, diameter . . . ), on the structural properties (doping level of the involved semiconductor materials, crystal quality, composition of the wells and of the barriers . . . ) of the nanowire, and on the “local” quality of the contact with the nanowire. Now, nanowires have different threshold voltages due to a dispersion of the morphological and structural properties, given that it is impossible to manufacture strictly identical nanowires.
However, a parallel connection of nanowires imposes a same potential difference for all nanowires. In case of a significant fluctuation of the nanowire threshold voltages, it is thus difficult, or even impossible, to simultaneously switch all nanowires to their conductive state. Further, a parallel connection may create nanowire short-circuits. Indeed, defective nanowires result in the creation of main conduction paths and thus of strong leakage currents. These disadvantages are all the more critical due to the small dimensions of nanowires, which have a diameter commonly ranging between a few nanometers and a few micrometers and a height ranging between a few hundreds of nanometers and a few tens of micrometers, thus making their properties all the more sensitive to defects.
Further, the light intensity of a LED mainly is a function of the intensity of the current that it conducts, and not of the value of the power supply voltage applied to the supply electrodes. If a substantially identical potential difference is imposed for all nanowires, and due to the differences between the properties thereof, the electric currents crossing the nanowire may thus be different, which may generate significant variations in the luminous power emitted from one nanowire to another.
At the same time, the series connection of light-emitting devices is known and is for example described in documents U.S. Pat. No. 7,535,028 and WO 2011/020959. However, the series connection here relates to devices having large lateral dimensions. Thus, the first document refers to a series connection of planar LEDs while the second document considers the connection of LED devices gathering nanowires interposed between two planar electrodes.
Due to the small diameter of nanowires, state-of-the-art series connection techniques cannot be applied. There especially are impassable technological barriers given the involved dimensions and the growth methods used. For example, it can easily be understood that the series connection by a gold wire of document WO 2011/020959 cannot be used to connect two adjacent nanowires in series. Similarly, it can easily be understood that the series connection described in document U.S. Pat. No. 7,535,028, which requires inclined sides to provide the deposition of a metal contact on a trench cannot be used to connect two substantially vertical nanowires in series.